The present application claims priority of Japanese Patent Application No. 2000-245211 filed on Aug. 11, 2000, which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a liquid crystal display device and a method for manufacturing the same.
2. Description of the Related Art
Conventionally, a liquid crystal display device equipped with a liquid crystal display panel has been applied to a wide range of display devices such as a TV monitor, a display apparatus for an OA (Office Automation) instrument, and a like.
The liquid crystal display panel is assembled by fixing a thin film transistor substrate (hereafter, may be referred to as a TFT substrate,) in which a thin film transistor (TFT) is formed, and an opposite substrate, in which a color filter is formed, in an opposite position through a space with some micrometers distance and a liquid crystal is sealed in this space.
FIG. 21 is a plan view showing a structure of one pixel of the TFT substrate of the conventional liquid crystal display panel, FIG. 22 is a sectional view along with the Pxe2x80x94P line of FIG. 21, and FIG. 23 is the sectional view along with a Pxe2x80x94P line of FIG. 21.
In a TFT substrate 101, as shown in FIG. 21, surrounding a transparent pixel electrode 102 arranged in a matrix pattern, each scanning line 103 to supply a scanning signal and each signal line 104 to supply a display signal are made to cross each other.
The TFT 101a (FIG. 23) is arranged around each crossing place of the scanning line 103 and the signal line 104 and used as a switching device, which applies a signal charge to a liquid crystal cell corresponding thereto by connecting a source electrode thereof to the transparent pixel electrode 102. In the TFT 101a, a scanning signal is input to a gate electrode 105, to which the scanning line 103 is connected, through the scanning line 103, and actuation and control are operated by inputting a display signal (data signal) in a drain electrode 106 to which the signal line 104 is connected.
A liquid crystal capacitor (condenser) made by interposing liquid crystal between the transparent pixel electrode 102 of the TFT substrate 101 and an opposite electrode (common electrode) of an opposite substrate has a charge (even while the TFT 101a is turned OFF) corresponding to a signal to work the liquid crystal.
In order to reinforce electric charging performance of the liquid crystal capacitor and reduce an electric potential variability of the transparent pixel electrode 102, an auxiliary capacitor is prepared in parallel to the liquid crystal capacitor. Namely, as shown in FIG. 21 to FIG. 23, a auxiliary capacitor common electrode 108, for example, is made, a auxiliary capacitor opposite electrode 109 is formed on a top part of the auxiliary capacitor common electrode 108 through a gate insulation film 110, the auxiliary capacitor opposite electrode 109 is connected to the source electrode 107 through a connecting electrode 111, and the auxiliary capacitor opposite electrode 109 is connected to the transparent pixel electrode 102 in a contact hole K1.
FIGS. 24A to 24F are process charts to explain a method for manufacturing this conventional liquid crystal display panel.
For preparation of the TFT substrate 101, first, as shown in FIG. 24A, chromium film is formed on a transparent insulation substrate 112 and patterning is carried out to form the gate electrode 105.
Subsequently, as shown in FIG. 24B, a silicon nitride film is formed on a whole surface, the gate insulation film 110 is formed, and the semiconductor layer 113 is formed by using amorphous silicon not doped and amorphous silicon made in a n+ type by doping impurities.
Next, as shown in FIG. 24C, chromium film is formed on the surface of the semiconductor layer 113 and a near place thereof and patterning is carried out to form the source electrode 107 and the drain electrode 106.
Next, as shown in FIG. 24D, the auxiliary capacitor opposite electrode 109 and the connecting electrode 111 are formed by using ITO (Indium Tin Oxide,) followed by, as shown in FIG. 24E, formation of the silicon nitride film and patterning is carried out to form a passivation film 114.
Next, as shown in FIG. 24F, a transparent acryl polymer is patterned and an overcoat layer 115 is formed on the passivation film 114.
Next, in the top of a central part of a pixel of the auxiliary capacitor common electrode 108, the passivation film 114 and the overcoat layer 115 are etched to the contact hole K1 (FIG. 21) and then, the ITO film is formed on the overcoat layer 115 to carry out patterning finally resulting in the transparent pixel electrode 102.
A structure and method of the TFT substrate as described above (hereinafter, referred to as the first conventional art) have been disclosed in, for example, Japanese Patent No. 2933879.
FIG. 25 is a plan view for showing a structure of one pixel of a TFT substrate of another conventional liquid crystal display panel, FIG. 26 is a sectional view along with a line Rxe2x80x94R of FIG. 25, and FIG. 27 is a sectional view along with a line Sxe2x80x94S of FIG. 25.
In the above described first conventional art, the auxiliary capacitor common electrode 108 is made and hence, an aperture ratio of the pixel reduces. On the other hand, the following art (hereafter, the second conventional art) has been proposed: the auxiliary capacitor common electrode 108 is not made and, as shown in FIG. 25 to FIG. 27, a auxiliary capacitor opposite electrode 208 is made on top of a scanning line 203 of a preseding stage though a gate insulation film 210, the gate insulation film 210 is interposed between scanning line 203 and auxiliary capacitor opposite electrode 208 to make a auxiliary capacitor for preparation of a TFT substrate 201.
To a gate electrode 205 of a TFT 201a, the scanning line 203 is connected and to a drain electrode 206, a signal line 204 is connected.
Where, a transparent pixel electrode 202 is connected to the auxiliary capacitor opposite electrode 208 in a contact hole K2 and connected to a source electrode 207 in a contact hole K3.
FIGS. 28A to 28F are process charts showing places corresponding to those of FIG. 26, and FIGS. 29A to 29F are process charts showing places corresponding to those of FIG. 27.
For preparation of the TFT substrate 201, first as shown in FIG. 29A and FIG. 28A, a transparent insulation substrate 209 is prepared and, as shown in FIG. 29B and FIG. 28B, a chromium film is formed on the transparent insulation substrate 209 and patterning is carried out to form the gate electrode 205 and the scanning line 203.
Next, as shown in FIGS. 29C and 28C, the silicon nitride film is formed on the entire surface and patterning is carried out to form the gate insulation film 210 and as shown FIG. 29C, a semiconductor layer 211 is formed by using amorphous silicon not doped and amorphous silicon made to the n+ type by doping.
Next, as shown in FIGS. 29D and 28D, the source electrode 207 and the drain electrode 206 are formed on the semiconductor layer 211 and also, the signal line 204 and the auxiliary capacitor opposite electrode 208 are formed.
Next, as shown in FIG. 28E, the silicon nitride is formed and patterning is carried out to form a passivation film 212.
Next, as shown in FIG. 29F and FIG. 28F, transparent acryl polymer is patterned and an overcoat layer 213 is formed on the passivation film 212 and then, in a point of connecting the transparent pixel electrode 202 to the source electrode 207 and in the point of connecting the transparent pixel electrode 202 to the auxiliary capacitor opposite electrode 208, the passivation film 212 and the overcoat film 213 are etched, the contact holes K2 and K3 are formed, and the ITO film is formed on the overcoat film 213 and patterning is carried out to form the transparent pixel electrode 202
However, in the above described first conventional art, in order to increase aperture ratio, the auxiliary capacitor common electrode 108 as a light blocking member must be formed in a thin shape and in order to increase the auxiliary capacitor, a region, where the auxiliary capacitor common electrode 108 as the electrode of the auxiliary capacitor overlaps on the auxiliary capacitor opposite electrode 109, must be increased. Therefore, in consideration of these requirements, the auxiliary capacitor opposite electrode 109 is located in a place near both the signal line (drain wire) 104 and hence, between the drain electrode 106 and the source electrode 107 to which the auxiliary capacitor opposite electrode 109 has been connected, a short is caused which is a major weakness in the first conventional art.
Also, in the step of forming the electrode and the insulation film on the substrate, many projected and recessed structures are formed. For example, after the chromium film is formed on the semiconductor layer 113 and patterning is carried out to form the source electrode 107 and the drain electrode 106, the ITO film is formed and patterning is carried out to form the transparent pixel electrode 102 and thus, in patterning of the ITO film, a defect pattern is easy to make, a short is caused between electrodes and between wires, and a point defect is easily caused which are major weaknesses in the first conventional art.
Also, in order to form the contact hole K1, in etching silicon nitride composing the passivation film 114 and the overcoat layer 115, immediately beneath the place where the contact hole K1 has been formed, the auxiliary capacitor opposite electrode 109 the gate insulation film 110, and the auxiliary capacitor common electrode 108, are layered and thus, an etchant for etching silicon nitride penetrates the gate insulation film 110 through a pin hole as a defect, for example, of the auxiliary capacitor opposite electrode 109 to cause the defect in the gate insulation film resulting in occurrence of leak of an electric current and a short of the auxiliary capacitor opposite electrode 109 and the auxiliary capacitor common electrode 108 (that is, a short of the source electrode 107 connected to the auxiliary capacitor opposite electrode 109 and the auxiliary capacitor common electrode 108; these are additional major weaknesses in the first conventional art.
On the other hand, in the above described second conventional art, there are required two contact holes K2 and K3 and therefore, a bad connection in even one contact hole K2 (K3) causes decrease in a yield due to the point defect which is a major weaknesses in the second conventional art.
Also, in order to form the contact hole K2 (K3,) in etching silicon nitride to constitute the passivation film 212 and the overcoat layer 213, immediate beneath the place where this contact hole K2 has been formed, the auxiliary capacitor opposite electrode 208, the gate insulation film 112, and the scanning line 203 of the preseding stage are layered and thus, the etchant penetrates the gate insulation film 210 through, for example, the pin hole of the auxiliary capacitor opposite electrode 208 to cause the defect in the gate insulation film resulting in a short of the auxiliary capacitor opposite electrode 208 and the scanning line 203 which is an additional weakness in the second conventional art. Therefore, in order to prevent a short caused immediately beneath the contact hole K1 in the first conventional art, as shown in FIG. 30, an art hereafter, a third conventional art in which a width of the place around connection of a connecting electrode 302 to the auxiliary capacitor opposite electrode 109 is increased, a contact hole K4 is made in a position with a distance from the place just above this auxiliary capacitor common electrode 108 to form a TFT substrate 301 and an art (hereafter, a fourth conventional art) in which in order to prevent a short immediately beneath the contact hole K2 in the second conventional art, as shown in FIG. 31, the auxiliary capacitor opposite electrode 208 is widened and a contact hole K5 is made in the place with the distance from the position immediately above the scanning line 203 to form a TFT substrate 401 have been proposed.
However, an orientation of the liquid crystal in the position of the contact hole K4 (K5) is disordered by a difference in a height of the contact hole K4 (K5) to cause lowering of contrast. Therefore, the place around the contact hole K4 (K5) must be shielded from light.
In the case of the first and second arts, shielding could be succeeded by using a metal wire; however, in case of the third and fourth arts, the auxiliary capacitor opposite electrode 109, the auxiliary capacitor opposite electrode 208, and the connecting electrode must be metallized or shielded by the opposite substrate to shield additionally the place around the contact hole K4 (K5) additionally from the light resulting in reduction of aperture ratio which is a major weakness in the third conventional art and the fourth conventional art.
In view of the above, it is an object of the present invention to provide a liquid crystal display device having a high reliability, which can suppress deterioration of a yield caused by a short electrodes, keeping enough aperture ratio, and an auxiliary capacitor, and a method for the manufacturing same.
According to a first aspect of the present invention, there is provided a liquid crystal display device including:
a scanning line to supply a scanning signal;
a signal line to supply a display signal;
a pixel electrode to apply a voltage to a liquid crystal layer;
a switching device containing a first electrode formed on a place near a crossing part of the scanning line with the signal line and connected to the scanning line to become a gate, a second electrode connected to the signal line to become a drain or a source, a third electrode connected to the pixel electrode to become a source or a drain and switching the display signal to feed the corresponding pixel electrode by the scanning signal;
an electrode for an auxiliary capacitor, located in a place opposite to the pixel electrode to define the auxiliary capacitor;
wherein in a same pixel, the second electrode and the third electrode are formed in a layer different from the first electrode through a first insulation film, the pixel electrode is formed in top of the first electrode, second electrode, and third electrode through a second insulation film, the electrode for an auxiliary capacitor, is formed in the same layer as the first electrode and is electrically connected to an adjacent scanning line.
In the foregoing, a preferable mode is one wherein the electrode for the auxiliary capacitor is made up of a transparent conductive material.
Also, a preferable mode is one wherein the electrode for the auxiliary capacitor is formed from the same material as that of the first electrode.
Also, a preferable mode is one wherein the electrode for the auxiliary capacitor is formed avoiding overlay on the signal line.
Also, a preferable mode is one wherein the scanning line and the signal line are formed by using aluminium or an aluminium alloy and terminal portions of the scanning line and signal line are used as signal input terminals.
According to a second aspect of the present invention, there is provided a method for manufacturing the liquid crystal display device, including:
a first step of forming a scanning line, a first electrode, which becomes a gate by connecting to the scanning line, and an electrode for the auxiliary capacitor by patterning after making a conductive film on a transparent insulation substrate;
a second step of forming an island semiconductor layer opposite to the first electrode through the first insulation film;
a third step of forming a signal line and also a second electrode to become a drain or source and a third electrode to become a source or drain which are connected to the signal line with a distance on the semiconductor layer;
a fourth step of forming a second insulation film on a top of the semiconductor layer, the second electrode, and the third electrode;
a fifth step of forming an opening on the second insulation film to reach the third electrode and form a pixel electrode connecting to the third electrode through the opening; wherein the electrode for the auxiliary capacitor and the pixel electrode are overlaid for forming the auxiliary capacitor.
In the foregoing second aspect, a preferable mode is one wherein in the first step, the first electrode and the electrode for the auxiliary capacitor are formed by using a same kind of conductive material.
Also, a preferable mode is one wherein the first step includes a step of forming the first electrode using the conductive material and the step of forming the first electrode for the auxiliary capacitor using the transparent conductive material.
Also, a preferable mode is one wherein in the first step, after formation of the scanning line, the electrode for the auxiliary capacitor is formed by using the transparent conductive material and also a terminal portion of the scanning line is covered with the conductive film using the transparent conductive material to form a signal input terminal.
Further, a preferable mode is one wherein in the first step, the electrode for the auxiliary capacitor is formed by using the transparent conductive material and also the conductive film is formed in a region, where the signal line is formed, by using the transparent conductive material;
in the third step, in the terminal portion, the signal line is formed to connect to the conductive film to form the signal input terminal.
Still further, a preferable mode is one wherein in the first step and the third step, the scanning line and the signal line are formed by using aluminium or an aluminium alloy and a surface of the terminal portions of the scanning line and signal line are exposed to make the signal input terminals.
With the above configurations, for example, even if in the case where the transparent auxiliary capacitor-forming electrode is formed avoiding overlaying on the third electrode and the contact hole is formed in the connecting place to connect the third electrode to the pixel electrode, immediate beneath the contact hole, the electrode layers are not layered above each other and thus, electrodes do not cause shorts.
Consequently, yield can be improved, and the liquid crystal display device of high quality can be provided.
In addition, simultaneously, enough aperture ratio can be kept and also the pixel electrode and the auxiliary capacitor electrode can receive the relatively large area to allow the relatively large capacitance to be kept.